mirror-linux/include/linux/irqchip
Sascha Bischoff dec85d2fbd irqchip/gic-v5: Move LPI allocation into the LPI domain
The IPI and ITS MSI domains currently allocate and release LPIs
directly, then pass the selected LPI ID to the parent LPI domain. This
leaks the LPI domain's allocation policy into its child domains and
forces each child to duplicate part of the parent domain's teardown.

Make the LPI domain allocate LPIs in its .alloc() callback and release
them in a matching .free() callback. Child domains can then request a
parent interrupt without passing an implementation-specific LPI ID,
and the LPI lifetime is tied to the domain that owns the LPI
namespace.

Remove the gicv5_alloc_lpi() and gicv5_free_lpi() wrappers now that no
external caller needs to manage LPIs directly.

This is a preparatory change for an actual leakage problem in the
allocation code and therefore tagged with the same Fixes tag.

Fixes: 0f01013258 ("irqchip/gic-v5: Add GICv5 LPI/IPI support")
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260506093634.382062-2-sascha.bischoff@arm.com
2026-05-11 14:56:03 +02:00
..
arm-gic-common.h
arm-gic-v3-prio.h
arm-gic-v3.h irqchip/gic-v3-its: Limit number of per-device MSIs to the range the ITS supports 2026-02-17 11:00:43 +01:00
arm-gic-v4.h KVM: arm64: WARN if unmapping a vLPI fails in any path 2025-06-20 13:52:29 -07:00
arm-gic-v5.h irqchip/gic-v5: Move LPI allocation into the LPI domain 2026-05-11 14:56:03 +02:00
arm-gic.h irqchip/gic: Add missing GICH_HCR control bits 2025-11-24 14:29:11 -08:00
arm-vgic-info.h irqchip/gic: Expose CPU interface VA to KVM 2025-11-24 14:29:11 -08:00
arm-vic.h
chained_irq.h
irq-bcm2836.h
irq-madera.h
irq-msi-lib.h irqchip/irq-msi-lib: Fix build with PCI disabled 2025-07-10 23:46:05 +02:00
irq-omap-intc.h
irq-renesas-rzt2h.h irqchip: Add RZ/{T2H,N2H} Interrupt Controller (ICU) driver 2025-12-15 22:44:32 +01:00
irq-renesas-rzv2h.h
irq-sa11x0.h
riscv-aplic.h
riscv-imsic.h irqchip/riscv-imsic: Adjust the number of available guest irq files 2026-02-06 19:05:34 +05:30
xtensa-mx.h
xtensa-pic.h