mirror-linux/kernel/irq
Linus Torvalds 3381d7b2b3 Updates for the [PCI] MSI subsystem:
- Add interrupt redirection infrastructure
 
     Some PCI controllers use a single demultiplexing interrupt for the MSI
     interrupts of subordinate devices.
 
     This prevents setting the interrupt affinity of device interrupts, which
     causes device interrupts to be delivered to a single CPU. That obviously is
     counterproductive for multi-queue devices and interrupt balancing.
 
     To work around this limitation the new infrastructure installs a dummy
     irq_set_affinity() callback which captures the affinity mask and picks a
     redirection target CPU out of the mask.
 
     When the PCI controller demultiplexes the interrupts it invokes a new
     handling function in the core, which either runs the interrupt handler in
     the context of the target CPU or delegates it to irq_work on the target CPU.
 
   - Utilize the interrupt redirection mechanism in the PCI DWC host controller
     driver.
 
     This allows affinity control for the subordinate device MSI interrupts
     instead of being randomly executed on the CPU which runs the demultiplex
     handler.
 
   - Replace the binary 64-bit MSI flag with a DMA mask
 
     Some PCI devices have PCI_MSI_FLAGS_64BIT in the MSI capability, but
     implement less than 64 address bits. This breaks on platforms where such a
     device is assigned an MSI address higher than what's supported.
 
     With the binary 64-bit flag there is no other choice than disabling 64-bit
     MSI support which leaves the device disfunctional.
 
     By using a DMA mask the address limit of a device can be described
     correctly which provides support for the above scenario.
 
   - Make use of the DMA mask based address limit in the hda/intel and radeon
     drivers to enable them on affected platforms.
 
   - The usual small cleanups and improvements
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmmJyPsQHHRnbHhAa2Vy
 bmVsLm9yZwAKCRCmGPVMDXSYocekEADAsS5FlUkFuBy6kODhl5J7b9/oqlL3IEnR
 3CdOrFO716dce+Gej+Wp3T93dJ3XsfD7nCZuy99+LwUkTubmaBJXfjY9S+Ket0ID
 Wc3ltiD6f3GEFB14rXN+fFG/u+OOLkaXdpbQpiTnqL4JAti9qF80D4uon28+FC/o
 wc1MhqVBPbOHU9iM196ngkZuXCNVPLcnZN6PNBgIn0sxx06LcK+daY0bNGxfn5Ua
 LY9SD8hN7tYlkDi42nB/ZXMrexqT9cxSqHObmPX+G/QLfXCRBtD+gyVbs+KVzpRL
 hmFERTlUh9tUdcQFrjgiZP/r4N5ilzsu6w5ZpSOEsGuahFUPZWJWFFC1D8rmq/Ay
 X9HKge1jqXJtbCf0pJM/kdbJKSH5S6aLP3iF37y+PqITIEIX8jIT3oVcvL9hI0BW
 HFxpuJfhAVg63kMegZCO/iROTusLHUZr8iwYOM7pEiCE6fP46jPijsPffVIWvrlJ
 2LVOv/A5wy9q8FW8sF9/M6CW7cdeYQF06Ce3qAyMxjZjEyR3KFBJCVWjhqyMxZJP
 3zFl1XXKXgRO+CDrYKVTPIaXR5D76k/l6MnECQpq81CQyQKm2h6A9PyY+n70FfbZ
 BimakUlBGCd92ZbSxzC9pAOiHo0ZoKtc5BhnsRhKVyBCmEKDazEplDuf49/OSZUE
 p2kaf/PuOw==
 =SCSQ
 -----END PGP SIGNATURE-----

Merge tag 'irq-msi-2026-02-09' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull MSI updates from Thomas Gleixner:
 "Updates for the [PCI] MSI subsystem:

   - Add interrupt redirection infrastructure

     Some PCI controllers use a single demultiplexing interrupt for the
     MSI interrupts of subordinate devices.

     This prevents setting the interrupt affinity of device interrupts,
     which causes device interrupts to be delivered to a single CPU.
     That obviously is counterproductive for multi-queue devices and
     interrupt balancing.

     To work around this limitation the new infrastructure installs a
     dummy irq_set_affinity() callback which captures the affinity mask
     and picks a redirection target CPU out of the mask.

     When the PCI controller demultiplexes the interrupts it invokes a
     new handling function in the core, which either runs the interrupt
     handler in the context of the target CPU or delegates it to
     irq_work on the target CPU.

   - Utilize the interrupt redirection mechanism in the PCI DWC host
     controller driver.

     This allows affinity control for the subordinate device MSI
     interrupts instead of being randomly executed on the CPU which runs
     the demultiplex handler.

   - Replace the binary 64-bit MSI flag with a DMA mask

     Some PCI devices have PCI_MSI_FLAGS_64BIT in the MSI capability,
     but implement less than 64 address bits. This breaks on platforms
     where such a device is assigned an MSI address higher than what's
     supported.

     With the binary 64-bit flag there is no other choice than disabling
     64-bit MSI support which leaves the device disfunctional.

     By using a DMA mask the address limit of a device can be described
     correctly which provides support for the above scenario.

   - Make use of the DMA mask based address limit in the hda/intel and
     radeon drivers to enable them on affected platforms

   - The usual small cleanups and improvements"

* tag 'irq-msi-2026-02-09' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  ALSA: hda/intel: Make MSI address limit based on the device DMA limit
  drm/radeon: Make MSI address limit based on the device DMA limit
  PCI/MSI: Check the device specific address mask in msi_verify_entries()
  PCI/MSI: Convert the boolean no_64bit_msi flag to a DMA address mask
  genirq/redirect: Prevent writing MSI message on affinity change
  PCI/MSI: Unmap MSI-X region on error
  genirq: Update effective affinity for redirected interrupts
  PCI: dwc: Enable MSI affinity support
  PCI: dwc: Code cleanup
  genirq: Add interrupt redirection infrastructure
  genirq/msi: Correct kernel-doc in <linux/msi.h>
2026-02-10 16:30:29 -08:00
..
Kconfig genirq: Remove IRQ timing tracking infrastructure 2025-12-15 22:20:50 +01:00
Makefile genirq: Remove IRQ timing tracking infrastructure 2025-12-15 22:20:50 +01:00
affinity.c lib/group_cpus: Let group_cpu_evenly() return the number of initialized masks 2025-07-01 10:24:11 -06:00
autoprobe.c genirq/autoprobe: Switch to lock guards 2025-05-07 09:08:11 +02:00
chip.c Updates for the [PCI] MSI subsystem: 2026-02-10 16:30:29 -08:00
cpuhotplug.c genirq/cpuhotplug: Notify about affinity changes breaking the affinity mask 2026-01-13 21:18:16 +01:00
debug.h
debugfs.c treewide: Update email address 2026-01-11 06:09:11 -10:00
devres.c genirq/devres: Add error handling in devm_request_*_irq() 2025-08-24 13:00:45 +02:00
dummychip.c
generic-chip.c syscore: Pass context data to callbacks 2025-11-14 10:01:52 +01:00
handle.c genirq: Remove IRQ timing tracking infrastructure 2025-12-15 22:20:50 +01:00
internals.h genirq/cpuhotplug: Notify about affinity changes breaking the affinity mask 2026-01-13 21:18:16 +01:00
ipi-mux.c
ipi.c
irq_sim.c genirq/irq_sim: Initialize work context pointers properly 2025-06-13 15:36:35 +02:00
irq_test.c genirq/test: Ensure CPU 1 is online for hotplug test 2025-09-03 17:04:52 +02:00
irqdesc.c Updates for the [PCI] MSI subsystem: 2026-02-10 16:30:29 -08:00
irqdomain.c Updates for the interrupt core subsystem: 2026-02-10 13:39:37 -08:00
kexec.c
manage.c Updates for the [PCI] MSI subsystem: 2026-02-10 16:30:29 -08:00
matrix.c treewide: Update email address 2026-01-11 06:09:11 -10:00
migration.c genirq/migration: Use irqd_get_parent_data() in irq_force_complete_move() 2025-04-04 17:08:36 +02:00
msi.c genirq/msi: Slightly simplify msi_domain_alloc() 2025-10-20 20:18:48 +02:00
pm.c syscore: Pass context data to callbacks 2025-11-14 10:01:52 +01:00
proc.c genirq/proc: Replace snprintf with strscpy in register_handler_proc 2026-01-30 08:53:53 +01:00
resend.c genirq/resend: Switch to lock guards 2025-05-07 09:08:11 +02:00
settings.h
spurious.c genirq: Move irq_wait_for_poll() to call site 2025-07-22 14:30:42 +02:00