191 lines
6.9 KiB
C
191 lines
6.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __LINUX_GPIO_GENERIC_H
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#define __LINUX_GPIO_GENERIC_H
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#include <linux/cleanup.h>
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#include <linux/gpio/driver.h>
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#include <linux/spinlock.h>
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struct device;
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#define GPIO_GENERIC_BIG_ENDIAN BIT(0)
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#define GPIO_GENERIC_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
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#define GPIO_GENERIC_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
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#define GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER BIT(3)
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#define GPIO_GENERIC_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
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#define GPIO_GENERIC_NO_OUTPUT BIT(5) /* only input */
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#define GPIO_GENERIC_NO_SET_ON_INPUT BIT(6)
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#define GPIO_GENERIC_PINCTRL_BACKEND BIT(7) /* Call pinctrl direction setters */
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#define GPIO_GENERIC_NO_INPUT BIT(8) /* only output */
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/**
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* struct gpio_generic_chip_config - Generic GPIO chip configuration data
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* @dev: Parent device of the new GPIO chip (compulsory).
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* @sz: Size (width) of the MMIO registers in bytes, typically 1, 2 or 4.
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* @dat: MMIO address for the register to READ the value of the GPIO lines, it
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* is expected that a 1 in the corresponding bit in this register means
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* the line is asserted.
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* @set: MMIO address for the register to SET the value of the GPIO lines, it
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* is expected that we write the line with 1 in this register to drive
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* the GPIO line high.
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* @clr: MMIO address for the register to CLEAR the value of the GPIO lines,
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* it is expected that we write the line with 1 in this register to
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* drive the GPIO line low. It is allowed to leave this address as NULL,
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* in that case the SET register will be assumed to also clear the GPIO
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* lines, by actively writing the line with 0.
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* @dirout: MMIO address for the register to set the line as OUTPUT. It is
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* assumed that setting a line to 1 in this register will turn that
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* line into an output line. Conversely, setting the line to 0 will
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* turn that line into an input.
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* @dirin: MMIO address for the register to set this line as INPUT. It is
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* assumed that setting a line to 1 in this register will turn that
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* line into an input line. Conversely, setting the line to 0 will
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* turn that line into an output.
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* @flags: Different flags that will affect the behaviour of the device, such
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* as endianness etc.
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*/
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struct gpio_generic_chip_config {
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struct device *dev;
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unsigned long sz;
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void __iomem *dat;
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void __iomem *set;
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void __iomem *clr;
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void __iomem *dirout;
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void __iomem *dirin;
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unsigned long flags;
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};
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/**
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* struct gpio_generic_chip - Generic GPIO chip implementation.
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* @gc: The underlying struct gpio_chip object, implementing low-level GPIO
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* chip routines.
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* @read_reg: reader function for generic GPIO
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* @write_reg: writer function for generic GPIO
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* @be_bits: if the generic GPIO has big endian bit order (bit 31 is
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* representing line 0, bit 30 is line 1 ... bit 0 is line 31) this
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* is set to true by the generic GPIO core. It is for internal
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* housekeeping only.
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* @reg_dat: data (in) register for generic GPIO
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* @reg_set: output set register (out=high) for generic GPIO
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* @reg_clr: output clear register (out=low) for generic GPIO
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* @reg_dir_out: direction out setting register for generic GPIO
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* @reg_dir_in: direction in setting register for generic GPIO
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* @dir_unreadable: indicates that the direction register(s) cannot be read and
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* we need to rely on out internal state tracking.
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* @pinctrl: the generic GPIO uses a pin control backend.
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* @bits: number of register bits used for a generic GPIO
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* i.e. <register width> * 8
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* @lock: used to lock chip->sdata. Also, this is needed to keep
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* shadowed and real data registers writes together.
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* @sdata: shadowed data register for generic GPIO to clear/set bits safely.
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* @sdir: shadowed direction register for generic GPIO to clear/set direction
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* safely. A "1" in this word means the line is set as output.
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*/
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struct gpio_generic_chip {
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struct gpio_chip gc;
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unsigned long (*read_reg)(void __iomem *reg);
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void (*write_reg)(void __iomem *reg, unsigned long data);
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bool be_bits;
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void __iomem *reg_dat;
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void __iomem *reg_set;
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void __iomem *reg_clr;
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void __iomem *reg_dir_out;
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void __iomem *reg_dir_in;
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bool dir_unreadable;
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bool pinctrl;
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int bits;
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raw_spinlock_t lock;
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unsigned long sdata;
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unsigned long sdir;
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};
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static inline struct gpio_generic_chip *
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to_gpio_generic_chip(struct gpio_chip *gc)
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{
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return container_of(gc, struct gpio_generic_chip, gc);
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}
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int gpio_generic_chip_init(struct gpio_generic_chip *chip,
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const struct gpio_generic_chip_config *cfg);
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/**
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* gpio_generic_chip_set() - Set the GPIO line value of the generic GPIO chip.
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* @chip: Generic GPIO chip to use.
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* @offset: Hardware offset of the line to set.
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* @value: New GPIO line value.
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*
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* Some modules using the generic GPIO chip, need to set line values in their
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* direction setters but they don't have access to the gpio-mmio symbols so
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* they use the function pointer in struct gpio_chip directly. This is not
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* optimal and can lead to crashes at run-time in some instances. This wrapper
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* provides a safe interface for users.
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*
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* Returns: 0 on success, negative error number of failure.
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*/
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static inline int
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gpio_generic_chip_set(struct gpio_generic_chip *chip, unsigned int offset,
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int value)
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{
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if (WARN_ON(!chip->gc.set))
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return -EOPNOTSUPP;
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return chip->gc.set(&chip->gc, offset, value);
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}
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/**
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* gpio_generic_read_reg() - Read a register using the underlying callback.
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* @chip: Generic GPIO chip to use.
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* @reg: Register to read.
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*
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* Returns: value read from register.
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*/
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static inline unsigned long
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gpio_generic_read_reg(struct gpio_generic_chip *chip, void __iomem *reg)
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{
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if (WARN_ON(!chip->read_reg))
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return 0;
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return chip->read_reg(reg);
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}
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/**
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* gpio_generic_write_reg() - Write a register using the underlying callback.
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* @chip: Generic GPIO chip to use.
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* @reg: Register to write to.
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* @val: New value to write.
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*/
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static inline void gpio_generic_write_reg(struct gpio_generic_chip *chip,
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void __iomem *reg, unsigned long val)
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{
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if (WARN_ON(!chip->write_reg))
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return;
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chip->write_reg(reg, val);
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}
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#define gpio_generic_chip_lock(gen_gc) \
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raw_spin_lock(&(gen_gc)->lock)
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#define gpio_generic_chip_unlock(gen_gc) \
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raw_spin_unlock(&(gen_gc)->lock)
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#define gpio_generic_chip_lock_irqsave(gen_gc, flags) \
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raw_spin_lock_irqsave(&(gen_gc)->lock, flags)
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#define gpio_generic_chip_unlock_irqrestore(gen_gc, flags) \
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raw_spin_unlock_irqrestore(&(gen_gc)->lock, flags)
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DEFINE_LOCK_GUARD_1(gpio_generic_lock,
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struct gpio_generic_chip,
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gpio_generic_chip_lock(_T->lock),
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gpio_generic_chip_unlock(_T->lock))
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DEFINE_LOCK_GUARD_1(gpio_generic_lock_irqsave,
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struct gpio_generic_chip,
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gpio_generic_chip_lock_irqsave(_T->lock, _T->flags),
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gpio_generic_chip_unlock_irqrestore(_T->lock, _T->flags),
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unsigned long flags)
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#endif /* __LINUX_GPIO_GENERIC_H */
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