271 lines
7.1 KiB
YAML
271 lines
7.1 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
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maintainers:
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- Vinod Koul <vkoul@kernel.org>
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description:
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The QMP PHY controller supports physical layer functionality for a number of
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controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.
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properties:
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compatible:
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enum:
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- qcom,sar2130p-qmp-usb3-dp-phy
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- qcom,sc7180-qmp-usb3-dp-phy
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- qcom,sc7280-qmp-usb3-dp-phy
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- qcom,sc8180x-qmp-usb3-dp-phy
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- qcom,sc8280xp-qmp-usb43dp-phy
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- qcom,sdm845-qmp-usb3-dp-phy
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- qcom,sm6350-qmp-usb3-dp-phy
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- qcom,sm8150-qmp-usb3-dp-phy
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- qcom,sm8250-qmp-usb3-dp-phy
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- qcom,sm8350-qmp-usb3-dp-phy
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- qcom,sm8450-qmp-usb3-dp-phy
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- qcom,sm8550-qmp-usb3-dp-phy
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- qcom,sm8650-qmp-usb3-dp-phy
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- qcom,sm8750-qmp-usb3-dp-phy
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- qcom,x1e80100-qmp-usb3-dp-phy
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reg:
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maxItems: 1
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clocks:
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minItems: 4
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maxItems: 5
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clock-names:
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minItems: 4
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items:
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- const: aux
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- const: ref
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- const: com_aux
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- const: usb3_pipe
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- const: cfg_ahb
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power-domains:
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maxItems: 1
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resets:
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maxItems: 2
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reset-names:
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items:
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- const: phy
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- const: common
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vdda-phy-supply: true
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vdda-pll-supply: true
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"#clock-cells":
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const: 1
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description:
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See include/dt-bindings/phy/phy-qcom-qmp.h
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"#phy-cells":
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const: 1
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description:
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See include/dt-bindings/phy/phy-qcom-qmp.h
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mode-switch: true
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orientation-switch: true
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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description: Output endpoint of the PHY
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unevaluatedProperties: false
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properties:
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endpoint:
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$ref: /schemas/graph.yaml#/$defs/endpoint-base
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unevaluatedProperties: false
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endpoint@0:
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$ref: /schemas/graph.yaml#/$defs/endpoint-base
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description: Display Port Output lanes of the PHY when used with static mapping,
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The entry index is the DP lanes index, and the number is the PHY
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signal in the order RX0, TX0, TX1, RX1.
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unevaluatedProperties: false
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properties:
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# Static lane mappings are mutually exclusive with typec-mux/orientation-mux
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data-lanes:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 2
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maxItems: 4
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oneOf:
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- items: # DisplayPort 1 lane, normal orientation
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- const: 3
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- items: # DisplayPort 1 lane, flipped orientation
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- const: 0
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- items: # DisplayPort 2 lanes, normal orientation
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- const: 3
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- const: 2
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- items: # DisplayPort 2 lanes, flipped orientation
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- const: 0
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- const: 1
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- items: # DisplayPort 4 lanes, normal orientation
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- const: 3
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- const: 2
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- const: 1
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- const: 0
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- items: # DisplayPort 4 lanes, flipped orientation
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- const: 0
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- const: 1
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- const: 2
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- const: 3
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required:
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- data-lanes
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endpoint@1:
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$ref: /schemas/graph.yaml#/$defs/endpoint-base
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description: USB Output lanes of the PHY when used with static mapping.
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The entry index is the USB3 lane in the order TX then RX, and the
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number is the PHY signal in the order RX0, TX0, TX1, RX1.
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unevaluatedProperties: false
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properties:
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# Static lane mappings are mutually exclusive with typec-mux/orientation-mux
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data-lanes:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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minItems: 2
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oneOf:
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- items: # USB3, normal orientation
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- const: 1
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- const: 0
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- items: # USB3, flipped orientation
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- const: 2
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- const: 3
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required:
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- data-lanes
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: Incoming endpoint from the USB controller
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port@2:
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$ref: /schemas/graph.yaml#/properties/port
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description: Incoming endpoint from the DisplayPort controller
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- resets
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- reset-names
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- vdda-phy-supply
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- vdda-pll-supply
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- "#clock-cells"
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- "#phy-cells"
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allOf:
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- $ref: /schemas/usb/usb-switch.yaml#
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- if:
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properties:
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compatible:
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enum:
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- qcom,sc7180-qmp-usb3-dp-phy
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- qcom,sdm845-qmp-usb3-dp-phy
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then:
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properties:
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clocks:
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maxItems: 5
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clock-names:
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maxItems: 5
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else:
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properties:
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clocks:
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maxItems: 4
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clock-names:
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maxItems: 4
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- if:
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properties:
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compatible:
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enum:
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- qcom,sar2130p-qmp-usb3-dp-phy
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- qcom,sc8280xp-qmp-usb43dp-phy
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- qcom,sm6350-qmp-usb3-dp-phy
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- qcom,sm8550-qmp-usb3-dp-phy
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- qcom,sm8650-qmp-usb3-dp-phy
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- qcom,sm8750-qmp-usb3-dp-phy
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- qcom,x1e80100-qmp-usb3-dp-phy
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then:
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required:
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- power-domains
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else:
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properties:
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power-domains: false
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
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phy@88eb000 {
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compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
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reg = <0x088eb000 0x4000>;
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clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
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<&gcc GCC_USB4_EUD_CLKREF_CLK>,
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<&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
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<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
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clock-names = "aux", "ref", "com_aux", "usb3_pipe";
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power-domains = <&gcc USB30_PRIM_GDSC>;
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resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
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<&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
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reset-names = "phy", "common";
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vdda-phy-supply = <&vreg_l9d>;
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vdda-pll-supply = <&vreg_l4d>;
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orientation-switch;
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#clock-cells = <1>;
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#phy-cells = <1>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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endpoint {
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remote-endpoint = <&typec_connector_ss>;
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};
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};
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port@1 {
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reg = <1>;
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endpoint {
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remote-endpoint = <&dwc3_ss_out>;
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};
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};
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port@2 {
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reg = <2>;
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endpoint {
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remote-endpoint = <&mdss_dp_out>;
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};
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};
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};
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};
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