60 lines
1.5 KiB
C
60 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2024 NXP
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*/
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#ifndef __DC_DISPLAY_ENGINE_H__
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#define __DC_DISPLAY_ENGINE_H__
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/regmap.h>
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#include <drm/drm_modes.h>
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#define DC_DISPLAYS 2
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#define DC_FRAMEGEN_MAX_FRAME_INDEX 0x3ffff
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#define DC_FRAMEGEN_MAX_CLOCK_KHZ 300000
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struct dc_fg {
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struct device *dev;
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struct regmap *reg;
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struct clk *clk_disp;
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};
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struct dc_tc {
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struct device *dev;
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struct regmap *reg;
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};
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struct dc_de {
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struct device *dev;
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struct regmap *reg_top;
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struct dc_fg *fg;
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struct dc_tc *tc;
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int irq_shdload;
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int irq_framecomplete;
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int irq_seqcomplete;
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};
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/* Frame Generator Unit */
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void dc_fg_cfg_videomode(struct dc_fg *fg, struct drm_display_mode *m);
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void dc_fg_enable(struct dc_fg *fg);
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void dc_fg_disable(struct dc_fg *fg);
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void dc_fg_shdtokgen(struct dc_fg *fg);
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u32 dc_fg_get_frame_index(struct dc_fg *fg);
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u32 dc_fg_get_line_index(struct dc_fg *fg);
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bool dc_fg_wait_for_frame_index_moving(struct dc_fg *fg);
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bool dc_fg_secondary_requests_to_read_empty_fifo(struct dc_fg *fg);
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void dc_fg_secondary_clear_channel_status(struct dc_fg *fg);
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int dc_fg_wait_for_secondary_syncup(struct dc_fg *fg);
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void dc_fg_enable_clock(struct dc_fg *fg);
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void dc_fg_disable_clock(struct dc_fg *fg);
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enum drm_mode_status dc_fg_check_clock(struct dc_fg *fg, int clk_khz);
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void dc_fg_init(struct dc_fg *fg);
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/* Timing Controller Unit */
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void dc_tc_init(struct dc_tc *tc);
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#endif /* __DC_DISPLAY_ENGINE_H__ */
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