Ville Syrjälä 20c2dbff34 drm/i915: Skip some timing checks on BXT/GLK DSI transcoders ... Apparently some BXT/GLK systems have DSI panels whose timings don't agree with the normal cpu transcoder hblank>=32 limitation. This is perhaps fine as there are no specific hblank/etc. limits listed for the BXT/GLK DSI transcoders. Move those checks out from the global intel_mode_valid() into into connector specific .mode_valid() hooks, skipping BXT/GLK DSI connectors. We'll leave the basic [hv]display/[hv]total checks in intel_mode_valid() as those seem like sensible upper limits regardless of the transcoder used. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9720 Fixes: 8f4b1068e7 ("drm/i915: Check some transcoder timing minimum limits") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231127145028.4899-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com> (cherry picked from commit e0ef2daa8c) Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2023-12-05 10:42:53 +02:00
..
drm	drm/i915: Skip some timing checks on BXT/GLK DSI transcoders	2023-12-05 10:42:53 +02:00
host1x	gpu: host1x: Correct allocated size for contexts	2023-10-11 22:52:44 +02:00
ipu-v3	…
trace	…
vga	…
Makefile	…