33 lines
1.0 KiB
Plaintext
33 lines
1.0 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/* Copyright (c) 2020-2021 Microchip Technology Inc */
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/dts-v1/;
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#include "mpfs-icicle-kit-common.dtsi"
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/ {
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model = "Microchip PolarFire-SoC Icicle Kit";
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compatible = "microchip,mpfs-icicle-es-reference-rtl-v2507",
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"microchip,mpfs-icicle-kit",
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"microchip,mpfs";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_fabric>;
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};
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/*
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* Due to silicon errata, routing via MSS IOs doesn't work on ES devices.
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* Instead, i2c1, appearing on B1/C1, which are normally MSS IOs, is routed
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* via the fabric and back to B1/C1 via "fabric-test" functionality.
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* This is done silently by Libero, so the iomux0 setting for i2c1 has to
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* be fabric IO, despite tooling etc saying that MSS IOs are used.
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*
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* See Section 3.3 of https://ww1.microchip.com/downloads/aemDocuments/documents/FPGA/ProductDocuments/Errata/polarfiresoc/microsemi_polarfire_soc_fpga_egineering_samples_errata_er0219_v1.pdf
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*/
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_fabric>;
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};
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