dba90f5a79
Dual and quad capable chips natively support dual and quad I/O variants
at up to 104MHz (1-2-2 and 1-4-4 operations). Reaching the maximum speed
of 166MHz is theoretically possible (while still unsupported in the
field) by adding a few more dummy cycles. Let's be accurate and clearly
state this limit.
Setting a maximum frequency implies adding the frequency parameter to
the macro, which is done using a variadic argument to avoid impacting
all the other drivers which already make use of this macro.
Fixes:
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|---|---|---|
| .. | ||
| bbm.h | ||
| blktrans.h | ||
| cfi.h | ||
| cfi_endian.h | ||
| concat.h | ||
| doc2000.h | ||
| flashchip.h | ||
| ftl.h | ||
| gen_probe.h | ||
| hyperbus.h | ||
| inftl.h | ||
| jedec.h | ||
| lpc32xx_mlc.h | ||
| lpc32xx_slc.h | ||
| map.h | ||
| mtd.h | ||
| mtdram.h | ||
| nand-ecc-mtk.h | ||
| nand-ecc-mxic.h | ||
| nand-ecc-sw-bch.h | ||
| nand-ecc-sw-hamming.h | ||
| nand-gpio.h | ||
| nand-qpic-common.h | ||
| nand.h | ||
| ndfc.h | ||
| nftl.h | ||
| onenand.h | ||
| onenand_regs.h | ||
| onfi.h | ||
| partitions.h | ||
| pfow.h | ||
| physmap.h | ||
| pismo.h | ||
| plat-ram.h | ||
| platnand.h | ||
| qinfo.h | ||
| rawnand.h | ||
| sh_flctl.h | ||
| sharpsl.h | ||
| spear_smi.h | ||
| spi-nor.h | ||
| spinand.h | ||
| super.h | ||
| ubi.h | ||
| xip.h | ||