mirror-linux/arch
Chao Peng 2ef444f160 KVM: x86: Add Intel PT context switch for each vcpu
Load/Store Intel Processor Trace register in context switch.
MSR IA32_RTIT_CTL is loaded/stored automatically from VMCS.
In Host-Guest mode, we need load/resore PT MSRs only when PT
is enabled in guest.

Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-12-21 11:28:35 +01:00
..
alpha TTY/Serial fixes for 4.20-rc2 2018-11-10 13:32:14 -06:00
arc ARC: io.h: Implement reads{x}()/writes{x}() 2018-11-30 11:26:29 -08:00
arm KVM/arm updates for 4.21 2018-12-19 20:33:55 +01:00
arm64 KVM/arm updates for 4.21 2018-12-19 20:33:55 +01:00
c6x
csky csky: bugfix tlb_get_pgd error. 2018-12-03 10:49:11 +08:00
h8300
hexagon
ia64 ia64: export node_distance function 2018-11-26 18:30:40 -08:00
m68k s390 updates for 4.20-rc2 2018-11-09 06:30:44 -06:00
microblaze microblaze: function_graph: Simplify with function_graph_enter() 2018-11-27 20:30:18 -05:00
mips kvm: introduce manual dirty log reprotect 2018-12-14 12:34:19 +01:00
nds32 nds32: function_graph: Simplify with function_graph_enter() 2018-11-27 20:30:43 -05:00
nios2
openrisc
parisc Merge branch 'parisc-4.20-4' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux 2018-12-04 09:10:39 -08:00
powerpc PPC KVM update for 4.21 2018-12-20 14:54:09 +01:00
riscv While rewriting the function graph tracer, I discovered a design flaw that 2018-11-30 09:32:34 -08:00
s390 KVM: s390: Fixes for 4.21 2018-12-19 22:17:09 +01:00
sh sh/function_graph: Simplify with function_graph_enter() 2018-11-27 20:31:39 -05:00
sparc Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc 2018-12-03 09:35:27 -08:00
um for-linus-20181109 2018-11-09 16:31:51 -06:00
unicore32
x86 KVM: x86: Add Intel PT context switch for each vcpu 2018-12-21 11:28:35 +01:00
xtensa xtensa: fix coprocessor part of ptrace_{get,set}xregs 2018-11-26 18:37:51 -08:00
.gitignore
Kconfig