In order to support correct initialization of the timer base in the HDMI QP IP block, setup platform data to include the required reference clock rate. While at it, ensure plat_data is zero-initialized in dw_hdmi_qp_rockchip_bind(). Reviewed-by: Daniel Stone <daniels@collabora.com> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250903-rk3588-hdmi-cec-v4-5-fa25163c4b08@collabora.com |
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| drm | ||
| host1x | ||
| ipu-v3 | ||
| nova-core | ||
| trace | ||
| vga | ||
| Makefile | ||