Raju Rangoju 9439a661c2 amd-xgbe: fix MAC_TCR_SS register width for 2.5G and 10M speeds ... Extend the MAC_TCR_SS (Speed Select) register field width from 2 bits to 3 bits to properly support all speed settings. The MAC_TCR register's SS field encoding requires 3 bits to represent all supported speeds: - 0x00: 10Gbps (XGMII) - 0x02: 2.5Gbps (GMII) / 100Mbps - 0x03: 1Gbps / 10Mbps - 0x06: 2.5Gbps (XGMII) - P100a only With only 2 bits, values 0x04-0x07 cannot be represented, which breaks 2.5G XGMII mode on newer platforms and causes incorrect speed select values to be programmed. Fixes: 07445f3c7c ("amd-xgbe: Add support for 10 Mbps speed") Co-developed-by: Guruvendra Punugupati <Guruvendra.Punugupati@amd.com> Signed-off-by: Guruvendra Punugupati <Guruvendra.Punugupati@amd.com> Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> Link: https://patch.msgid.link/20260226170753.250312-1-Raju.Rangoju@amd.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>		2026-02-28 14:22:34 -08:00
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pds_core	Convert remaining multi-line kmalloc_obj/flex GFP_KERNEL uses	2026-02-22 08:26:33 -08:00
xgbe	amd-xgbe: fix MAC_TCR_SS register width for 2.5G and 10M speeds	2026-02-28 14:22:34 -08:00
7990.c	…
7990.h	…
Kconfig	amd-xgbe: do not select NET_SELFTESTS when INET is disabled	2026-02-05 19:09:18 -08:00
Makefile	…
a2065.c	…
a2065.h	…
amd8111e.c	…
amd8111e.h	…
ariadne.c	…
ariadne.h	…
atarilance.c	…
au1000_eth.c	…
au1000_eth.h	…
declance.c	declance: Remove IRQF_ONESHOT	2026-01-28 19:36:23 -08:00
hplance.c	…
hplance.h	…
lance.c	treewide: Replace kmalloc with kmalloc_obj for non-scalar types	2026-02-21 01:02:28 -08:00
mvme147.c	…
nmclan_cs.c	…
pcnet32.c	Convert more 'alloc_obj' cases to default GFP_KERNEL arguments	2026-02-21 20:03:00 -08:00
sun3lance.c	…
sunlance.c	…