Mario Limonciello 6e385845ee drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13 ... commit e701156ccc upstream. SMU13 overrides dynamic PCIe lane width and dynamic speed by when on certain hosts. commit 38e4ced804 ("drm/amd/pm: conditionally disable pcie lane switching for some sienna_cichlid SKUs") worked around this issue by setting up certain SKUs to set up certain limits, but the same fundamental problem with those hosts affects all SMU11 implmentations as well, so align the SMU11 and SMU13 driver handling. Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 6.1.x Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2023-08-03 10:23:47 +02:00
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drm	drm/amd: Align SMU11 SMU_MSG_OverridePcieParameters implementation with SMU13	2023-08-03 10:23:47 +02:00
host1x	gpu: host1x: Fix memory leak of device names	2023-05-11 23:03:12 +09:00
ipu-v3	gpu: ipu-v3: common: Add of_node_put() for reference returned by of_graph_get_port_by_id()	2023-03-10 09:33:10 +01:00
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