mirror-linux/drivers/gpu
Matt Roper 4039e44237 drm/i915/pvc: Annotate two more workaround/tuning registers as MCR
XEHPC_LNCFMISCCFGREG0 and XEHPC_L3SCRUB are both in MCR register ranges
on PVC (with HALFBSLICE and L3BANK replication respectively), so they
should be explicitly declared as MCR registers and use MCR-aware
workaround handlers.

The workarounds/tuning settings should still be applied properly on PVC
even without the MCR annotation, but readback verification on
CONFIG_DRM_I915_DEBUG_GEM builds could potentitally give false positive
"workaround lost on load" warnings on parts fused such that a unicast
read targets a terminated register instance.

Fixes: a9e69428b1 ("drm/i915: Define MCR registers explicitly")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230201222831.608281-1-matthew.d.roper@intel.com
2023-02-08 09:40:34 -08:00
..
drm drm/i915/pvc: Annotate two more workaround/tuning registers as MCR 2023-02-08 09:40:34 -08:00
host1x gpu: host1x: Staticize host1x_syncpt_fence_ops 2022-11-25 16:14:59 +01:00
ipu-v3 gpu: ipu-v3: common: Add of_node_put() for reference returned by of_graph_get_port_by_id() 2022-12-16 18:40:29 +01:00
trace
vga
Makefile