171 lines
4.0 KiB
C
171 lines
4.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (c) 2011-2014 Samsung Electronics Co., Ltd
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* http://www.samsung.com
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*/
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#ifndef __LINUX_MFD_SEC_RTC_H
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#define __LINUX_MFD_SEC_RTC_H
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enum s5m_rtc_reg {
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S5M_RTC_SEC,
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S5M_RTC_MIN,
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S5M_RTC_HOUR,
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S5M_RTC_WEEKDAY,
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S5M_RTC_DATE,
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S5M_RTC_MONTH,
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S5M_RTC_YEAR1,
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S5M_RTC_YEAR2,
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S5M_ALARM0_SEC,
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S5M_ALARM0_MIN,
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S5M_ALARM0_HOUR,
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S5M_ALARM0_WEEKDAY,
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S5M_ALARM0_DATE,
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S5M_ALARM0_MONTH,
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S5M_ALARM0_YEAR1,
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S5M_ALARM0_YEAR2,
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S5M_ALARM1_SEC,
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S5M_ALARM1_MIN,
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S5M_ALARM1_HOUR,
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S5M_ALARM1_WEEKDAY,
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S5M_ALARM1_DATE,
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S5M_ALARM1_MONTH,
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S5M_ALARM1_YEAR1,
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S5M_ALARM1_YEAR2,
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S5M_ALARM0_CONF,
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S5M_ALARM1_CONF,
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S5M_RTC_STATUS,
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S5M_WTSR_SMPL_CNTL,
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S5M_RTC_UDR_CON,
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S5M_RTC_REG_MAX,
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};
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enum s2mps_rtc_reg {
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S2MPS_RTC_CTRL,
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S2MPS_WTSR_SMPL_CNTL,
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S2MPS_RTC_UDR_CON,
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S2MPS_RSVD,
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S2MPS_RTC_SEC,
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S2MPS_RTC_MIN,
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S2MPS_RTC_HOUR,
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S2MPS_RTC_WEEKDAY,
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S2MPS_RTC_DATE,
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S2MPS_RTC_MONTH,
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S2MPS_RTC_YEAR,
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S2MPS_ALARM0_SEC,
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S2MPS_ALARM0_MIN,
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S2MPS_ALARM0_HOUR,
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S2MPS_ALARM0_WEEKDAY,
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S2MPS_ALARM0_DATE,
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S2MPS_ALARM0_MONTH,
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S2MPS_ALARM0_YEAR,
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S2MPS_ALARM1_SEC,
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S2MPS_ALARM1_MIN,
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S2MPS_ALARM1_HOUR,
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S2MPS_ALARM1_WEEKDAY,
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S2MPS_ALARM1_DATE,
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S2MPS_ALARM1_MONTH,
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S2MPS_ALARM1_YEAR,
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S2MPS_OFFSRC,
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S2MPS_RTC_REG_MAX,
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};
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enum s2mpg10_rtc_reg {
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S2MPG10_RTC_CTRL,
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S2MPG10_RTC_UPDATE,
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S2MPG10_RTC_SMPL,
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S2MPG10_RTC_WTSR,
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S2MPG10_RTC_CAP_SEL,
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S2MPG10_RTC_MSEC,
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S2MPG10_RTC_SEC,
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S2MPG10_RTC_MIN,
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S2MPG10_RTC_HOUR,
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S2MPG10_RTC_WEEK,
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S2MPG10_RTC_DAY,
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S2MPG10_RTC_MON,
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S2MPG10_RTC_YEAR,
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S2MPG10_RTC_A0SEC,
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S2MPG10_RTC_A0MIN,
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S2MPG10_RTC_A0HOUR,
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S2MPG10_RTC_A0WEEK,
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S2MPG10_RTC_A0DAY,
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S2MPG10_RTC_A0MON,
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S2MPG10_RTC_A0YEAR,
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S2MPG10_RTC_A1SEC,
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S2MPG10_RTC_A1MIN,
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S2MPG10_RTC_A1HOUR,
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S2MPG10_RTC_A1WEEK,
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S2MPG10_RTC_A1DAY,
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S2MPG10_RTC_A1MON,
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S2MPG10_RTC_A1YEAR,
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S2MPG10_RTC_OSC_CTRL,
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};
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#define RTC_I2C_ADDR (0x0C >> 1)
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#define HOUR_12 (1 << 7)
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#define HOUR_AMPM (1 << 6)
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#define HOUR_PM (1 << 5)
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#define S5M_ALARM0_STATUS (1 << 1)
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#define S5M_ALARM1_STATUS (1 << 2)
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#define S5M_UPDATE_AD (1 << 0)
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#define S2MPS_ALARM0_STATUS (1 << 2)
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#define S2MPS_ALARM1_STATUS (1 << 1)
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/* RTC Control Register */
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#define BCD_EN_SHIFT 0
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#define BCD_EN_MASK (1 << BCD_EN_SHIFT)
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#define MODEL24_SHIFT 1
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#define MODEL24_MASK (1 << MODEL24_SHIFT)
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/* RTC Update Register1 */
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#define S5M_RTC_UDR_SHIFT 0
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#define S5M_RTC_UDR_MASK (1 << S5M_RTC_UDR_SHIFT)
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#define S2MPS_RTC_WUDR_SHIFT 4
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#define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT)
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#define S2MPS15_RTC_AUDR_SHIFT 4
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#define S2MPS15_RTC_AUDR_MASK (1 << S2MPS15_RTC_AUDR_SHIFT)
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#define S2MPS13_RTC_AUDR_SHIFT 1
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#define S2MPS13_RTC_AUDR_MASK (1 << S2MPS13_RTC_AUDR_SHIFT)
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#define S2MPS15_RTC_WUDR_SHIFT 1
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#define S2MPS15_RTC_WUDR_MASK (1 << S2MPS15_RTC_WUDR_SHIFT)
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#define S2MPS_RTC_RUDR_SHIFT 0
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#define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT)
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#define RTC_TCON_SHIFT 1
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#define RTC_TCON_MASK (1 << RTC_TCON_SHIFT)
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#define S5M_RTC_TIME_EN_SHIFT 3
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#define S5M_RTC_TIME_EN_MASK (1 << S5M_RTC_TIME_EN_SHIFT)
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/*
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* UDR_T field in S5M_RTC_UDR_CON register determines the time needed
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* for updating alarm and time registers. Default is 7.32 ms.
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*/
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#define S5M_RTC_UDR_T_SHIFT 6
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#define S5M_RTC_UDR_T_MASK (0x3 << S5M_RTC_UDR_T_SHIFT)
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#define S5M_RTC_UDR_T_7320_US (0x0 << S5M_RTC_UDR_T_SHIFT)
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#define S5M_RTC_UDR_T_1830_US (0x1 << S5M_RTC_UDR_T_SHIFT)
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#define S5M_RTC_UDR_T_3660_US (0x2 << S5M_RTC_UDR_T_SHIFT)
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#define S5M_RTC_UDR_T_450_US (0x3 << S5M_RTC_UDR_T_SHIFT)
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/* RTC Hour register */
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#define HOUR_PM_SHIFT 6
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#define HOUR_PM_MASK (1 << HOUR_PM_SHIFT)
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/* RTC Alarm Enable */
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#define ALARM_ENABLE_SHIFT 7
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#define ALARM_ENABLE_MASK (1 << ALARM_ENABLE_SHIFT)
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/* WTSR & SMPL registers */
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#define SMPL_ENABLE_SHIFT 7
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#define SMPL_ENABLE_MASK (1 << SMPL_ENABLE_SHIFT)
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#define WTSR_ENABLE_SHIFT 6
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#define WTSR_ENABLE_MASK (1 << WTSR_ENABLE_SHIFT)
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#define S2MPG10_WTSR_COLDTIMER GENMASK(6, 5)
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#define S2MPG10_WTSR_COLDRST BIT(4)
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#define S2MPG10_WTSR_WTSRT GENMASK(3, 1)
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#define S2MPG10_WTSR_WTSR_EN BIT(0)
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#endif /* __LINUX_MFD_SEC_RTC_H */
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