mirror-linux/include/linux/mtd
Ezra Buehler 34a956739d mtd: spinand: Add support for 5-byte IDs
E.g. ESMT chips will return an identification code with a length of 5
bytes. In order to prevent ambiguity, flash chips would actually need to
return IDs that are up to 17 or more bytes long due to JEDEC's
continuation scheme. I understand that if a manufacturer ID is located
in bank N of JEDEC's database (there are currently 16 banks), N - 1
continuation codes (7Fh) need to be added to the identification code
(comprising of manufacturer ID and device ID). However, most flash chip
manufacturers don't seem to implement this (correctly).

Signed-off-by: Ezra Buehler <ezra.buehler@husqvarnagroup.com>
Reviewed-by: Martin Kurbanov <mmkurbanov@salutedevices.com>
Tested-by: Martin Kurbanov <mmkurbanov@salutedevices.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20240125200108.24374-2-ezra@easyb.ch
2024-02-05 14:23:52 +01:00
..
bbm.h
blktrans.h
cfi.h mtd: cfi: Annotate struct cfi_private with __counted_by 2023-09-22 16:33:23 +02:00
cfi_endian.h
concat.h
doc2000.h
flashchip.h
ftl.h
gen_probe.h
hyperbus.h
inftl.h
jedec.h mtd: rawnand: Ensure the nand chip supports cached reads 2023-10-16 10:47:22 +02:00
lpc32xx_mlc.h
lpc32xx_slc.h
map.h
mtd.h
mtdram.h
nand-ecc-mtk.h
nand-ecc-mxic.h
nand-ecc-sw-bch.h
nand-ecc-sw-hamming.h
nand-gpio.h
nand.h
ndfc.h
nftl.h
onenand.h
onenand_regs.h
onfi.h mtd: rawnand: Ensure the nand chip supports cached reads 2023-10-16 10:47:22 +02:00
partitions.h
pfow.h
physmap.h
pismo.h
plat-ram.h
platnand.h
qinfo.h mtd: Annotate struct lpddr_private with __counted_by 2023-09-22 16:33:21 +02:00
rawnand.h * Raw NAND 2023-12-22 12:45:52 +01:00
sh_flctl.h
sharpsl.h
spear_smi.h
spi-nor.h
spinand.h mtd: spinand: Add support for 5-byte IDs 2024-02-05 14:23:52 +01:00
super.h
ubi.h
xip.h