f935448acf
Cavium ThunderX2 SMMU doesn't support MSI and also doesn't have unique irq lines for gerror, eventq and cmdq-sync. New named irq "combined" is set as a errata workaround, which allows to share the irq line by register single irq handler for all the interrupts. Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Geetha sowjanya <gakula@caviumnetworks.com> [will: reworked irq equality checking and added SPI check] Signed-off-by: Will Deacon <will.deacon@arm.com> |
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| .. | ||
| arm,smmu-v3.txt | ||
| arm,smmu.txt | ||
| iommu.txt | ||
| mediatek,iommu.txt | ||
| msm,iommu-v0.txt | ||
| nvidia,tegra20-gart.txt | ||
| nvidia,tegra30-smmu.txt | ||
| renesas,ipmmu-vmsa.txt | ||
| rockchip,iommu.txt | ||
| samsung,sysmmu.txt | ||
| ti,omap-iommu.txt | ||