73 lines
1.5 KiB
YAML
73 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/fsl,imx8ulp-sim-lpav.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8ULP LPAV System Integration Module (SIM)
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maintainers:
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- Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
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description:
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The i.MX8ULP LPAV subsystem contains a block control module known as
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SIM LPAV, which offers functionalities such as clock gating or reset
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line assertion/de-assertion.
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properties:
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compatible:
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const: fsl,imx8ulp-sim-lpav
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reg:
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maxItems: 1
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: bus
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- const: core
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- const: plat
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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mux-controller:
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$ref: /schemas/mux/reg-mux.yaml#
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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- '#reset-cells'
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- mux-controller
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8ulp-clock.h>
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clock-controller@2da50000 {
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compatible = "fsl,imx8ulp-sim-lpav";
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reg = <0x2da50000 0x10000>;
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clocks = <&cgc2 IMX8ULP_CLK_LPAV_BUS_DIV>,
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<&cgc2 IMX8ULP_CLK_HIFI_DIVCORE>,
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<&cgc2 IMX8ULP_CLK_HIFI_DIVPLAT>;
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clock-names = "bus", "core", "plat";
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#clock-cells = <1>;
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#reset-cells = <1>;
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mux-controller {
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compatible = "reg-mux";
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#mux-control-cells = <1>;
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mux-reg-masks = <0x8 0x00000200>;
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};
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};
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