Shaoyun Liu 1bf8b4642c drm/amd/include : Update MES v12 API header - SUSPEND ... Update SUSPEND API to support sdma queues. It's been supportted since 0x82 for gfx12 Signed-off-by: Shaoyun Liu <shaoyun.liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2026-01-27 18:08:35 -05:00
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asic_reg	drm/amdgpu: Add THM 15.0.0 headers	2026-01-08 11:41:30 -05:00
ivsrcid	drm/amdgpu: Add gfx v12_1 interrupt source header	2025-12-16 13:29:13 -05:00
aldebaran_ip_offset.h	…
amd_acpi.h	drm/amdgpu: add UMA allocation setting helpers	2026-01-05 16:59:58 -05:00
amd_cper.h	drm/amdgpu: fix SPDX header on amd_cper.h	2025-10-28 09:52:22 -04:00
amd_pcie.h	…
amd_pcie_helpers.h	…
amd_shared.h	drm/amdgpu: Describe @AMD_IP_BLOCK_TYPE_RAS in amd_ip_block_type enum	2026-01-05 16:25:29 -05:00
amdgpu_reg_state.h	…
arct_ip_offset.h	…
atom-bits.h	…
atom-names.h	…
atom-types.h	…
atombios.h	drm/amdgpu: fixing typo in macro name	2025-05-22 12:01:57 -04:00
atomfirmware.h	drm/amdgpu: atomfirmware.h: fix multiple spelling mistakes	2025-08-29 10:06:29 -04:00
atomfirmwareid.h	…
beige_goby_ip_offset.h	…
cgs_common.h	…
cik_structs.h	…
cyan_skillfish_ip_offset.h	…
dimgrey_cavefish_ip_offset.h	…
discovery.h	…
displayobject.h	…
dm_pp_interface.h	drm/amd/display: Add pixel_clock to amd_pp_display_configuration	2025-09-15 16:52:41 -04:00
kgd_kfd_interface.h	…
kgd_pp_interface.h	drm/amd: Enable SMU 15_0_0 support	2026-01-08 11:41:42 -05:00
mes_v11_api_def.h	drm/amdgpu: update remove after reset flag for MES remove queue	2025-10-13 14:14:36 -04:00
mes_v12_api_def.h	drm/amd/include : Update MES v12 API header - SUSPEND	2026-01-27 18:08:35 -05:00
navi10_enum.h	…
navi10_ip_offset.h	…
navi12_ip_offset.h	…
navi14_ip_offset.h	…
pptable.h	…
renoir_ip_offset.h	…
sienna_cichlid_ip_offset.h	…
soc15_hw_ip.h	drm/amdgpu: Add hwid for AIGC	2025-12-08 13:56:29 -05:00
soc15_ih_clientid.h	drm/amdgpu: update soc15 IH client ids	2025-12-08 13:56:29 -05:00
soc21_enum.h	…
soc24_enum.h	…
soc_v1_0_enum.h	drm/amdgpu: Fix SHMEM alignment mode for GFX 12.1.0	2025-12-08 14:25:34 -05:00
soc_v1_0_ih_clientid.h	drm/amdgpu: Add soc v1_0 ih client id table	2025-12-16 13:27:42 -05:00
umsch_mm_4_0_api_def.h	…
v9_structs.h	…
v10_structs.h	…
v11_structs.h	…
v12_structs.h	drm/amdgpu: add new compute/mes mqd structure	2025-12-08 13:56:39 -05:00
vangogh_ip_offset.h	…
vega10_enum.h	…
vega10_ip_offset.h	…
vega20_ip_offset.h	…
vi_structs.h	…
yellow_carp_offset.h	…