abf35df215
IEEE 802.3ae clause 45 specifies a somewhat modified MDIO protocol for use by 10GIGE phys. The main change is a 21 bit address split into a 5 bit device ID and a 16 bit register offset. The definition is designed so that normal and extended devices can run on the same MDIO bus. Extend mdio-bitbang to do the new protocol. At the MDIO bus level the protocol is requested by or'ing MII_ADDR_C45 into the register offset. Make phy_read/phy_write/etc pass a full 32 bit register offset. This does not attempt to make the phy layer support C45 style PHYs, just to provide the MDIO bus support. Tested against a Broadcom 10GE phy with ID 0x206034, and several Broadcom 10/100/1000 Phys in normal mode. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| bcm63xx.c | ||
| broadcom.c | ||
| cicada.c | ||
| davicom.c | ||
| et1011c.c | ||
| fixed.c | ||
| icplus.c | ||
| lxt.c | ||
| marvell.c | ||
| mdio-bitbang.c | ||
| mdio-gpio.c | ||
| mdio-octeon.c | ||
| mdio_bus.c | ||
| national.c | ||
| phy.c | ||
| phy_device.c | ||
| qsemi.c | ||
| realtek.c | ||
| smsc.c | ||
| ste10Xp.c | ||
| vitesse.c | ||