Jing Zhang 1c8f6c7b83 perf/arm-cmn: Fix the unhandled overflow status of counter 4 to 7 ... [ Upstream commit 7f949f6f54 ] The register por_dt_pmovsr Bits[7:0] indicates overflow from counters 7 to 0. But in arm_cmn_handle_irq(), only handled the overflow status of Bits[3:0] which results in unhandled overflow status of counters 4 to 7. So let the overflow status of DTC counters 4 to 7 to be handled. Fixes: 0ba64770a2 ("perf: Add Arm CMN-600 PMU driver") Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/1695612152-123633-1-git-send-email-renyu.zj@linux.alibaba.com Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>		2023-10-19 23:08:50 +02:00
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hisilicon	drivers/perf: hisi: Don't migrate perf to the CPU going to teardown	2023-07-19 16:21:00 +02:00
Kconfig	…
Makefile	…
alibaba_uncore_drw_pmu.c	…
apple_m1_cpu_pmu.c	…
arm-cci.c	…
arm-ccn.c	…
arm-cmn.c	perf/arm-cmn: Fix the unhandled overflow status of counter 4 to 7	2023-10-19 23:08:50 +02:00
arm_dmc620_pmu.c	…
arm_dsu_pmu.c	…
arm_pmu.c	…
arm_pmu_acpi.c	…
arm_pmu_platform.c	…
arm_smmuv3_pmu.c	perf/smmuv3: Enable HiSilicon Erratum 162001900 quirk for HIP08/09	2023-09-23 11:11:00 +02:00
arm_spe_pmu.c	…
fsl_imx8_ddr_perf.c	perf/imx_ddr: speed up overflow frequency of cycle	2023-09-23 11:11:00 +02:00
marvell_cn10k_ddr_pmu.c	…
marvell_cn10k_tad_pmu.c	…
qcom_l2_pmu.c	…
qcom_l3_pmu.c	…
riscv_pmu.c	perf: RISC-V: Remove PERF_HES_STOPPED flag checking in riscv_pmu_start()	2023-07-23 13:49:44 +02:00
riscv_pmu_legacy.c	…
riscv_pmu_sbi.c	…
thunderx2_pmu.c	…
xgene_pmu.c	…