Melissa Wen 7f2b5237e3 drm/amd/display: restore invalid MSA timing check for freesync ... This restores the original behavior that gets min/max freq from EDID and only set DP/eDP connector as freesync capable if "sink device is capable of rendering incoming video stream without MSA timing parameters", i.e., `allow_invalid_MSA_timing_params` is true. The condition was mistakenly removed by 0159f88a99 ("drm/amd/display: remove redundant freesync parser for DP"). CC: Mario Limonciello <mario.limonciello@amd.com> CC: Alex Hung <alex.hung@amd.com> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3915 Fixes: 0159f88a99 ("drm/amd/display: remove redundant freesync parser for DP") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Melissa Wen <mwen@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org		2025-01-28 16:26:13 -05:00
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amdgpu_dm	drm/amd/display: restore invalid MSA timing check for freesync	2025-01-28 16:26:13 -05:00
dc	drm/amd/display: Correct register address in dcn35	2025-01-28 16:23:30 -05:00
dmub	drm/amd/display: [FW Promotion] Release 0.0.248.0	2025-01-10 12:00:01 -05:00
include	drm/amd/display: Remove last parts of timing_trace	2024-11-04 11:26:36 -05:00
modules	drm/amd/display: Revised for Replay Pseudo vblank control	2025-01-10 12:11:38 -05:00
Kconfig	drm/amd/display: add CEC notifier to amdgpu driver	2025-01-10 11:58:57 -05:00
Makefile	drm/amd/display: Refactor DCN3X into component folder	2024-06-14 16:18:55 -04:00