e8100643ff
On Xe3p_XPC, there are now four registers reserved to express the XeCore mask rather than just three. Define the new registers and update the IP descriptor accordingly. Note that this only applies to Xe3p_XPC for now; Xe3p_LPG still only uses three registers to express the mask. Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patch.msgid.link/20260205214139.48515-4-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> |
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| drm | ||
| host1x | ||
| ipu-v3 | ||
| nova-core | ||
| trace | ||
| vga | ||
| Makefile | ||