a812b09a6b
Add the Devicetree binding for the PCIe Root Complex found on the SpacemiT K1 SoC. This Root Complex is derived from the Synopsys Designware PCIe IP. It supports up to three PCIe ports operating at PCIe link speed up to 5 GT/sec. One of the ports uses a combo PHY, which is typically used to support a USB3 port. Signed-off-by: Alex Elder <elder@riscstar.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Tested-by: Jason Montleon <jmontleo@redhat.com> Tested-by: Johannes Erdfelt <johannes@erdfelt.com> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251113214540.2623070-4-elder@riscstar.com |
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| .. | ||
| bindings | ||
| changesets.rst | ||
| dynamic-resolution-notes.rst | ||
| index.rst | ||
| kernel-api.rst | ||
| of_unittest.rst | ||
| overlay-notes.rst | ||
| usage-model.rst | ||